1. Field of the Invention
The present invention relates to a transversal filter used in a ghost image canceller of a television receiver and, more particularly, to a transversal filter incorporating MOS transistor amplifiers with their load circuits made up of C-MOS transistors.
2. Description of the Prior Art
The radio wave radiated from a transmission antenna of a television broadcasting station is reflexible on artificial constructions. When a television reception antenna receives a wave coming directly from a transmission antenna, i.e., desired wave, and waves reflected on buildings and the like, an image of the desired wave is superimposed by offset images of the reflected waves, so called "ghost images", on the face plate of the television receiver. The ghost image is a major cause of the impairment of picture quality to television receivers, and various means have been devised for the elimination and prevention of ghosts. One example of such devices is a ghost canceller using a transversal filter. The device has a delay circuit formed in a serial connection of a plurality of delay elements each having a small time lag. The outputs of the delay elements are summed on a cumulative basis so as to cancel ghosts, and a signal getting rid of the ghosts, i.e., a signal compensated against ghosts, is obtained. The above-mentioned ghost canceller is described in an article entitled "A NOVEL AUTOMATIC GHOST CANCELLER" by S. Makino et al., IEEE Trans. CE-26, No. 3, Aug. 1980, p. 629.
FIG. 1 shows in block form the conventional ghost canceller using a transversal filter, and FIG. 2 shows in block form details of the transversal filter. This ghost canceller is located within the video signal amplifying stage, with its input terminal receiving a video signal including ghosts. The video signal received at the input terminal 1 is fed through a transversal filter 3 and sent out through an output terminal 2 to the next stage (not shown). The ghosts included in the video signal are mostly eliminated by the transversal filter 3, and the video signal including little residual ghosts is sent out through the terminal 2. For elimination, a ghost image component included in the video signal at the output of the filter 3 is detected, generally by using the vertical sync pulse. Thus, ghosts superimposed on the vertical sync signal are detected.
The video signal received at the input terminal 1 is also supplied to a sync separator 12 by which the vertical sync pulse is separated. The separated vertical sync pulse is delivered to a timing generator 13 and used as a trigger for generating timing signals. A reference signal generator 5 responds to a timing signal from the timing generator 13 to produce a reference signal having the same waveform as of the vertioal sync pulse, and the reference signal synchronized with the vertical sync pulse is delivered to a subtracter 4, which also receive the video signal via the filter circuit 3. The subtracter 4 performs subtraction between the video signal including the vertical sync pulse and the reference signal produced by the reference signal generator 5, and consequently, a ghost component superimposed on the vertical sync pulse in the video signal is extracted. The detected ghost component is differentiated by a differentiator 6 and fed to a comparator 7, by which the differentiated signal is shaped into a digital pulse in accordance with two threshold levels of the comparator 7. The pulse signal enters a shift register 8, the timing of which is controlled by the timing generator 13. Binary data in the shift register 8 is read out to a subtracter 9 so that the gain data stored in a tap gain memory 10 are modified. Namely, the contents of the tap gain memory 10 are also given to the subtracter 9 and the difference of the two subtracter inputs is fed to the tap gain memory 10. The contents of the tap gain memory 10 are modified again.
Upon completion of this process, the tap gain data in the memory 10 is read out to a D/A converter 11, by which the data is converted into an analog voltage V. The analog voltage V is applied as a control voltage to a tap amplifier 16 in the transversal filter 3 so that the gain of the amplifier 16 is controlled. As a result, a video signal with an alleviated ghost component is provided at the output of the filter circuit 3. This process is repeated and, eventually, the transversal filter 3 provides the video signal including almost no ghost component.
The operation of the ghost canceller shown in FIG. 1 will further be explained using the signal waveforms shown in FIG. 3 observed at various portions of the arrangement of FIG. 1. In FIG. 3, waveform (a) represents the reference signal produced by the reference signal generator 5, with symbol "F" indicating the positive-going edge of the signal. Waveform (b) represents a vertical sync pulse included in the video signal provided by the transversal filter 3, and a ghost component is shown by hatching. Waveform (c) represents a ghost component extracted through the subtraction process conducted by the subtracter 4. Waveform (d) represents the output pulse P of the differentiator 6 produced in response to the ghost component.
At a timing of the edge F of the reference signal, the control signal (gate pulse) is sent from the timing generator 13 to the shift register 8, and the shift register 8 starts operating at this moment. The pulse P from the comparator 7 enters the shift register 8 on expiration of time T following the edge F of the reference signal. The shift register 8 stores the ghost image information of a certain number of bits and sends the information sequentially to the subtracter 9.
Subsequently, the modification operation for data stored in the tap gain memory 10 begins. The tap gain memory 10 is addressed in correspondence to tap amplifiers 16 (C.sub.1 through C.sub.5), and tap gain data in the address locations of the memory 10 are modified in the order correspondingly from an amplifier for the input signal with smaller delay to an amplifier for the input signal with larger delay, i.e., in the order of C.sub.1, C.sub.2, . . . , and C.sub.5 in this example. After all data stored in the tap gain memory 10 have been modified, new tap gain data is given to each tap amplifier 16 of the transversal filter 3. Data read out from the tap gain memory 10 is converted into an analog voltage V by the D/A converter 11, and it is applied to the tap amplifiers 16 (C.sub.1 -C.sub.5).
The video signals with their amplitudes varied by the tap amplifiers 16 (C.sub.1 -C.sub.5) are supplied to delay elements 151 through 155. The video signal is delayed in predetermined time lengths by the delay elements 151-155 and synthesized into a signal, which is delivered to an adder 14. The adder 14 also receives the video signal from the terminal 1 so that it is added to the delayed video signals, and the resultant video signal is sent out through the terminal 2.
Since the processes of ghost detection, data modification for the tap gain memory 10, and application of the control voltage to each tap amplifier are carried out using a signal synchronized with the vertical sync pulse, these operations take place once in every field cycle until the ghost component is no longer detected. Thus, the ghosts are alleviated progressively.
The transversal filter 3 in the foregoing ghost canceller employs video signal amplifiers 16 and 18 as shown in FIG. 2. The amplifier 18 receives the video signal and provides two output signals having exactly the same amplitude and d.c. level, by opposite polarities. The reason why the dual-polarity amplifier 18 is used for the transversal filter 3 is that a ghost component superimposed on the video signal can have not only a like polarity, but also an opposite polarity with respect to the video signal, and a polarity selector switch 17 provided at the input of the tap gain amplifier 16 is set to the uninverted position (X) for the amplifier 18 when the ghost component is of the like polarity, or it is set to the inverted position (Y) when the ghost image is of opposite polarity, whereby ghosts of any polarity can be eliminated.
The conventional arrangement of the video signal amplifier will be described. The amplifier 18 is configured in a well-known differential amplifier as shown in FIG. 4. This differential amplifier consists of three N-MOS transistors 27, 28 and 29, load resistors 21 and 22 connecting the drain electrodes of the transistors 27 and 28 to a power supply 20, and bias voltage sources 26 and 30 for providing bias voltages to the gate electrodes of the transistors 28 and 29, respectively. The input signal is applied to a terminal 25 which is connected to the gate electrode of the transistor 27. The drain electrode of the transistor 27 is led out to an output terminal 23 which provides an output signal in opposite polarity with respect to the input signal, and the terminal 23 is connected to the contact Y of the polarity selector switch 17 in FIG. 2. The drain electrode of the transistor 28 is led out to an output terminal 24 which provides an output signal in like polarity with respect to the input signal, and the terminal 24 is connected to the contact X of the polarity selector switch 17 in FIG. 2.
The differential amplifier shown in FIG. 4 has a satisfactory linearlity, and in order for the amplifier to have a large gain and consumes less power, a large resistance needs to be selected for the load resistors 21 and 22. However, fabrication of such resistors within an integrated circuit would occupy a large area on the chip, and therefore, this arrangement is not suited for integration. This affair will further be described in the following.
FIG. 5 shows the d.c. input-output characteristics of the differential amplifier shown in FIG. 4. In the figure, the ordinate indicates output voltage Vout, the abscissa indicates the input voltage Vin. The curves V.sub.01 and V.sub.02 represent the noninverted and inverted input-output characteristics, respectively. At the intersection of both curves V.sub.01 and V.sub.02, the input voltage level is equal to the reference bias voltage (+V.sub.BB). The actual operating range of the differential amplifier is a section V.sub.R extending on both sides of the intersection, and the gradient of the curves at the intersection indicates the gain of the differential amplifier. The gradient of both curves is substantially constant in a wide range, creating less distortion in the output waveform, i.e., providing satisfactory linearity. However, due to the correlation between the gain and the load resistance, a large resistance must be selected for the load resistors 21 and 22, as will be explained in connection with the following expression. EQU Av=.+-.gm R.sub.L ( 1)
where Av represents the voltage gain, gm represents the mutual conductance of the driving MOS transistors 27 and 28, R.sub.L represents the resistance of the load resistors 21 and 22, the positive sign is applied to the case of the noninverted output, and the negative sign is applied to the case of the inverted output. The mutual conductance gm is determined depending on the property of the MOS transistors 27 and 28 and is substantially constant, and therefore, the resistors 21 and 22 must have a large resistance R.sub.L in order to provide a large gain, as can be seen from Expression (1). In general, load resistors of several kiloohms or more are needed to obtain a voltage gain of 0 dB or higher. Such resistors, when integrated on a semiconductor chip, occupy a considerable area and also can have a large error in the value of resistance, and therefore, the use of resistors in load circuits of the transistors 27 and 28 is not desirable.
FIG. 6 shows a differential amplifier with its load resistors replaced with N-MOS transistors. In the arrangement, N-MOS transistors 31 and 32 are used as loads of the transistors 27 and 28. The advantage of this differential amplifier is its fabrication in a smaller area because resistors are not used in the load circuit. However, it has a drawback of inferior linearity as compared with the differential amplifier shown in FIG. 4, as will be explained in the following.
FIG. 7 shows the d.c. input-output characteristics of the differential amplifier shown in FIG. 6. On the graph, the output voltage Vout is plotted on the ordinate against the input voltage Vin on the abscissa, and the curves V.sub.04 and V.sub.05 represent the inverted and noninverted outputs, respectively. The input voltage level is equal to the input reference bias voltage (+D.sub.BB) at the intersection of both curves V.sub.04 and V.sub.05. In the characteristics of FIG. 7, the gradient of the slope of both curves V.sub.04 and V.sub.05 is not constant within the operating range, resulting in an inferior linearity, i.e., the output voltage does not vary constantly with respect to the variation of the input voltage, as compared with the characteristics of FIG. 5. FIG. 8 shows the on-resistance characteristics of the N-MOS transistor of a load. On the graph, the ordinate indicates on-resistance Ron-N, the abscissa indicates the drain-source voltage V.sub.DS of the N-MOS transistor of the load. When the input signal is applied to the input terminal 25 of the differential amplifier of FIG. 6, the drain-source voltage of the driving MOS transistors 27 and 28 varies, causing the drain-source voltage V.sub.DS of the loading N-MOS transistors 31 and 32 to vary. The variation of the drain-source voltage V.sub.DS of the loading N-MOS transistors 31 and 32 is accompanied by the variation in the on-resistance, and thus, the load resistance varies depending on the magnitude of the input voltage. On this account, a constant voltage gain cannot be obtained as can be seen from Expression (1). Thus, the differential amplifier of FIG. 6 is inferior to the differential amplifier shown in FIG. 4 in the property of linearity.
Differential amplifier as shown in FIG. 4 occupies a large chip area due to load resistors and are unsuited for high density integration as mentioned previously, while differential amplifier as shown in FIG. 6 provides unsatisfactory linearity. The linearity of amplifier is an influential factor on the deghosting effect of the ghost canceller, the reason of which will be described in the following.
FIG. 9 shows the simplified waveform of the video signal, with symbol A indicating the sync pulse, while symbol B indicating the maximum white level. FIG. 10 shows the waveform of the video signal which is superimposed by a ghost component of the same polarity. As described previously, the ghost canceller detects a ghost component G superimposed on the sync pulse A, and it is used to control the tap gain of each tap amplifier 16 so as to produce inverted ghost waveforms. The inverted waveforms are added to the input video signal by the adder 14 so that the ghost component on the sync pulse A and maximum white level B are eliminated. In this case, the ratio of the magnitude of ghost component on the sync pulse to the magnitude of ghost component on the maximum white level B at the input of the tap amplifier 16 must be equal to the ratio of the magnitude a of the sync pulse to the magnitude of the maximum white level b. However, the amplifier with inferior linearity as shown in FIG. 6 creates a distortion at a portion of the maximum white level B as shown in FIG. 11, resulting in a varied amplitude ratio of the sync pulse A to the maximum white level B. Therefore, the inverted ghost waveforms are also distorted, and the ghost canceller solely eliminates the ghost component in the portion of the sync pulse A, leaving the ghost component unremoved in the portion of the maximum white level B. The process for the video signal superimposed by a ghost component in opposite polarity is exactly the same as of the video signal superimposed by a ghost component in like polarity as described in connection with FIGS. 10 and 11. Furthermore, tap amplifiers 16 having characteristics of distortion lead to exactly the same result, and the deghosting effect is impaired.